Transistors and other semiconductor devices may be fabricated through a number of subtractive and additive processes. Certain benefits, such as channel mobility for transistors, may be had by forming the device layers in semiconductor material other than silicon, such as germanium and III-V materials. Where a crystalline silicon substrate serves as a starting material, epitaxial growth techniques may be utilized to additively form a transistor channel region to integrate such non-silicon materials onto the silicon substrate, typically referred to as heteroepitaxy. Such epitaxial processes are challenging at least in part due to lattice mismatch and mismatch in thermal coefficients of expansion (CTE) between the seeding silicon surface and the epitaxially grown semiconductor.
Pioneers in silicon-based FET devices have now commercialized devices employing non-planar transistors which utilize a body of silicon material protruding from a substrate surface and employ a gate electrode that wraps around two, three, or even all sides of the silicon body (i.e., dual-gate, tri-gate, nanowire transistors). Source and drain regions are formed in the body, or as regrown portions coupled to the body, on either side of the gate electrode. Such non-planar designs have vastly improved channel control and associated electrical performance (e.g., short channel effect, reduced source-to-drain resistance, etc.) relative to planar silicon device designs.
It would be advantageous to integrate non-silicon materials onto the silicon substrate, particularly for non-planar transistor designs through epitaxial growth of device layers amenable to such topologies. However, techniques and structures worthy of manufacturing heteroepitaxial device layers over silicon substrates are unknown. For example, a highly subtractive process might entail a blanket epitaxial non-silicon film growth over a silicon substrate followed by an etch delineating non-silicon, non-planar bodies from which the transistors are formed. For such a technique the seeding silicon substrate has the advantage of being pristine, however such a large area growth can be challenging from a crystal defect standpoint, particularly where there is significant stress induced through thermal expansion or lattice mismatch in the epitaxial film. An alternative process might entail epitaxial growth the of non-silicon film only in regions of limited substrate area where the non-silicon, non-planar bodies are to be disposed. While such a technique may not be subject to the same issues particular to large area growths, other issues arise. For example, the seeding silicon surface may suffer damage and/or become deformed from preliminary processing of the substrate directed at delineating the regions where the epitaxial growth is to occur. Where a recess etch of the growth substrate (silicon) surface is performed, a bowl or divot shape in the seeding surface may result and subsequently impair epitaxial growth.